Merge branch 'ab/retire-ppc-sha1'
Remove the assembly version of SHA-1 implementation for PPC. * ab/retire-ppc-sha1: Makefile: use $(OBJECTS) instead of $(C_OBJ) Makefile + hash.h: remove PPC_SHA1 implementation
This commit is contained in:
Junio C Hamano
commit
fd1ec82547
3
INSTALL
3
INSTALL
@ -135,8 +135,7 @@ Issues of note:
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By default, git uses OpenSSL for SHA1 but it will use its own
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library (inspired by Mozilla's) with either NO_OPENSSL or
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BLK_SHA1. Also included is a version optimized for PowerPC
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(PPC_SHA1).
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BLK_SHA1.
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- "libcurl" library is used for fetching and pushing
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repositories over http:// or https://, as well as by
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22
Makefile
22
Makefile
@ -155,9 +155,6 @@ include shared.mak
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# Define BLK_SHA1 environment variable to make use of the bundled
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# optimized C SHA1 routine.
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#
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# Define PPC_SHA1 environment variable when running make to make use of
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# a bundled SHA1 routine optimized for PowerPC.
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#
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# Define DC_SHA1 to unconditionally enable the collision-detecting sha1
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# algorithm. This is slower, but may detect attempted collision attacks.
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# Takes priority over other *_SHA1 knobs.
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@ -1803,6 +1800,10 @@ ifdef APPLE_COMMON_CRYPTO
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SHA1_MAX_BLOCK_SIZE = 1024L*1024L*1024L
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endif
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ifdef PPC_SHA1
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$(error the PPC_SHA1 flag has been removed along with the PowerPC-specific SHA-1 implementation.)
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endif
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ifdef OPENSSL_SHA1
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EXTLIBS += $(LIB_4_CRYPTO)
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BASIC_CFLAGS += -DSHA1_OPENSSL
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@ -1811,10 +1812,6 @@ ifdef BLK_SHA1
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LIB_OBJS += block-sha1/sha1.o
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BASIC_CFLAGS += -DSHA1_BLK
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else
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ifdef PPC_SHA1
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LIB_OBJS += ppc/sha1.o ppc/sha1ppc.o
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BASIC_CFLAGS += -DSHA1_PPC
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else
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ifdef APPLE_COMMON_CRYPTO
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COMPAT_CFLAGS += -DCOMMON_DIGEST_FOR_OPENSSL
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BASIC_CFLAGS += -DSHA1_APPLE
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@ -1848,7 +1845,6 @@ endif
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endif
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endif
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endif
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endif
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ifdef OPENSSL_SHA256
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EXTLIBS += $(LIB_4_CRYPTO)
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@ -2595,13 +2591,7 @@ missing_compdb_dir =
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compdb_args =
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endif
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ASM_SRC := $(wildcard $(OBJECTS:o=S))
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ASM_OBJ := $(ASM_SRC:S=o)
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C_OBJ := $(filter-out $(ASM_OBJ),$(OBJECTS))
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$(C_OBJ): %.o: %.c GIT-CFLAGS $(missing_dep_dirs) $(missing_compdb_dir)
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$(QUIET_CC)$(CC) -o $*.o -c $(dep_args) $(compdb_args) $(ALL_CFLAGS) $(EXTRA_CPPFLAGS) $<
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$(ASM_OBJ): %.o: %.S GIT-CFLAGS $(missing_dep_dirs) $(missing_compdb_dir)
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$(OBJECTS): %.o: %.c GIT-CFLAGS $(missing_dep_dirs) $(missing_compdb_dir)
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$(QUIET_CC)$(CC) -o $*.o -c $(dep_args) $(compdb_args) $(ALL_CFLAGS) $(EXTRA_CPPFLAGS) $<
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%.s: %.c GIT-CFLAGS FORCE
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@ -3093,7 +3083,7 @@ t/helper/test-%$X: t/helper/test-%.o GIT-LDFLAGS $(GITLIBS) $(REFTABLE_TEST_LIB)
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check-sha1:: t/helper/test-tool$X
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t/helper/test-sha1.sh
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SP_OBJ = $(patsubst %.o,%.sp,$(C_OBJ))
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SP_OBJ = $(patsubst %.o,%.sp,$(OBJECTS))
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$(SP_OBJ): %.sp: %.c %.o
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$(QUIET_SP)cgcc -no-compile $(ALL_CFLAGS) $(EXTRA_CPPFLAGS) \
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@ -28,10 +28,6 @@
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* try to do the silly "optimize away loads" part because it won't
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* see what the value will be).
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*
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* Ben Herrenschmidt reports that on PPC, the C version comes close
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* to the optimized asm with this (ie on PPC you don't want that
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* 'volatile', since there are lots of registers).
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*
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* On ARM we get the best code generation by forcing a full memory barrier
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* between each SHA_ROUND, otherwise gcc happily get wild with spilling and
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* the stack frame size simply explode and performance goes down the drain.
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@ -237,9 +237,6 @@ AC_MSG_NOTICE([CHECKS for site configuration])
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# tests. These tests take up a significant amount of the total test time
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# but are not needed unless you plan to talk to SVN repos.
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#
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# Define PPC_SHA1 environment variable when running make to make use of
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# a bundled SHA1 routine optimized for PowerPC.
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#
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# Define NO_OPENSSL environment variable if you do not have OpenSSL.
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#
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# Define OPENSSLDIR=/foo/bar if your openssl header and library files are in
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6
hash.h
6
hash.h
@ -4,9 +4,7 @@
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#include "git-compat-util.h"
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#include "repository.h"
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#if defined(SHA1_PPC)
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#include "ppc/sha1.h"
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#elif defined(SHA1_APPLE)
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#if defined(SHA1_APPLE)
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#include <CommonCrypto/CommonDigest.h>
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#elif defined(SHA1_OPENSSL)
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#include <openssl/sha.h>
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@ -32,7 +30,7 @@
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* platform's underlying implementation of SHA-1; could be OpenSSL,
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* blk_SHA, Apple CommonCrypto, etc... Note that the relevant
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* SHA-1 header may have already defined platform_SHA_CTX for our
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* own implementations like block-sha1 and ppc-sha1, so we list
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* own implementations like block-sha1, so we list
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* the default for OpenSSL compatible SHA-1 implementations here.
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*/
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#define platform_SHA_CTX SHA_CTX
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72
ppc/sha1.c
72
ppc/sha1.c
@ -1,72 +0,0 @@
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/*
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* SHA-1 implementation.
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*
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* Copyright (C) 2005 Paul Mackerras <paulus@samba.org>
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*
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* This version assumes we are running on a big-endian machine.
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* It calls an external sha1_core() to process blocks of 64 bytes.
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*/
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#include <stdio.h>
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#include <string.h>
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#include "sha1.h"
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void ppc_sha1_core(uint32_t *hash, const unsigned char *p,
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unsigned int nblocks);
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int ppc_SHA1_Init(ppc_SHA_CTX *c)
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{
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c->hash[0] = 0x67452301;
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c->hash[1] = 0xEFCDAB89;
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c->hash[2] = 0x98BADCFE;
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c->hash[3] = 0x10325476;
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c->hash[4] = 0xC3D2E1F0;
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c->len = 0;
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c->cnt = 0;
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return 0;
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}
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int ppc_SHA1_Update(ppc_SHA_CTX *c, const void *ptr, unsigned long n)
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{
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unsigned long nb;
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const unsigned char *p = ptr;
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c->len += (uint64_t) n << 3;
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while (n != 0) {
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if (c->cnt || n < 64) {
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nb = 64 - c->cnt;
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if (nb > n)
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nb = n;
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memcpy(&c->buf.b[c->cnt], p, nb);
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if ((c->cnt += nb) == 64) {
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ppc_sha1_core(c->hash, c->buf.b, 1);
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c->cnt = 0;
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}
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} else {
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nb = n >> 6;
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ppc_sha1_core(c->hash, p, nb);
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nb <<= 6;
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}
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n -= nb;
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p += nb;
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}
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return 0;
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}
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int ppc_SHA1_Final(unsigned char *hash, ppc_SHA_CTX *c)
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{
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unsigned int cnt = c->cnt;
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c->buf.b[cnt++] = 0x80;
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if (cnt > 56) {
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if (cnt < 64)
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memset(&c->buf.b[cnt], 0, 64 - cnt);
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ppc_sha1_core(c->hash, c->buf.b, 1);
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cnt = 0;
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}
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if (cnt < 56)
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memset(&c->buf.b[cnt], 0, 56 - cnt);
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c->buf.l[7] = c->len;
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ppc_sha1_core(c->hash, c->buf.b, 1);
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memcpy(hash, c->hash, 20);
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return 0;
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}
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25
ppc/sha1.h
25
ppc/sha1.h
@ -1,25 +0,0 @@
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/*
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* SHA-1 implementation.
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*
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* Copyright (C) 2005 Paul Mackerras <paulus@samba.org>
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*/
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#include <stdint.h>
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typedef struct {
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uint32_t hash[5];
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uint32_t cnt;
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uint64_t len;
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union {
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unsigned char b[64];
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uint64_t l[8];
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} buf;
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} ppc_SHA_CTX;
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int ppc_SHA1_Init(ppc_SHA_CTX *c);
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int ppc_SHA1_Update(ppc_SHA_CTX *c, const void *p, unsigned long n);
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int ppc_SHA1_Final(unsigned char *hash, ppc_SHA_CTX *c);
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#define platform_SHA_CTX ppc_SHA_CTX
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#define platform_SHA1_Init ppc_SHA1_Init
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#define platform_SHA1_Update ppc_SHA1_Update
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#define platform_SHA1_Final ppc_SHA1_Final
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224
ppc/sha1ppc.S
224
ppc/sha1ppc.S
@ -1,224 +0,0 @@
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/*
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* SHA-1 implementation for PowerPC.
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*
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* Copyright (C) 2005 Paul Mackerras <paulus@samba.org>
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*/
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/*
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* PowerPC calling convention:
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* %r0 - volatile temp
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* %r1 - stack pointer.
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* %r2 - reserved
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* %r3-%r12 - Incoming arguments & return values; volatile.
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* %r13-%r31 - Callee-save registers
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* %lr - Return address, volatile
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* %ctr - volatile
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*
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* Register usage in this routine:
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* %r0 - temp
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* %r3 - argument (pointer to 5 words of SHA state)
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* %r4 - argument (pointer to data to hash)
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* %r5 - Constant K in SHA round (initially number of blocks to hash)
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* %r6-%r10 - Working copies of SHA variables A..E (actually E..A order)
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* %r11-%r26 - Data being hashed W[].
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* %r27-%r31 - Previous copies of A..E, for final add back.
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* %ctr - loop count
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*/
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/*
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* We roll the registers for A, B, C, D, E around on each
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* iteration; E on iteration t is D on iteration t+1, and so on.
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* We use registers 6 - 10 for this. (Registers 27 - 31 hold
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* the previous values.)
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*/
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#define RA(t) (((t)+4)%5+6)
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#define RB(t) (((t)+3)%5+6)
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#define RC(t) (((t)+2)%5+6)
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#define RD(t) (((t)+1)%5+6)
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#define RE(t) (((t)+0)%5+6)
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/* We use registers 11 - 26 for the W values */
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#define W(t) ((t)%16+11)
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/* Register 5 is used for the constant k */
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/*
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* The basic SHA-1 round function is:
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* E += ROTL(A,5) + F(B,C,D) + W[i] + K; B = ROTL(B,30)
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* Then the variables are renamed: (A,B,C,D,E) = (E,A,B,C,D).
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*
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* Every 20 rounds, the function F() and the constant K changes:
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* - 20 rounds of f0(b,c,d) = "bit wise b ? c : d" = (^b & d) + (b & c)
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* - 20 rounds of f1(b,c,d) = b^c^d = (b^d)^c
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* - 20 rounds of f2(b,c,d) = majority(b,c,d) = (b&d) + ((b^d)&c)
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* - 20 more rounds of f1(b,c,d)
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*
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* These are all scheduled for near-optimal performance on a G4.
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* The G4 is a 3-issue out-of-order machine with 3 ALUs, but it can only
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* *consider* starting the oldest 3 instructions per cycle. So to get
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* maximum performance out of it, you have to treat it as an in-order
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* machine. Which means interleaving the computation round t with the
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* computation of W[t+4].
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*
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* The first 16 rounds use W values loaded directly from memory, while the
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* remaining 64 use values computed from those first 16. We preload
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* 4 values before starting, so there are three kinds of rounds:
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* - The first 12 (all f0) also load the W values from memory.
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* - The next 64 compute W(i+4) in parallel. 8*f0, 20*f1, 20*f2, 16*f1.
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* - The last 4 (all f1) do not do anything with W.
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*
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* Therefore, we have 6 different round functions:
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* STEPD0_LOAD(t,s) - Perform round t and load W(s). s < 16
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* STEPD0_UPDATE(t,s) - Perform round t and compute W(s). s >= 16.
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* STEPD1_UPDATE(t,s)
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* STEPD2_UPDATE(t,s)
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* STEPD1(t) - Perform round t with no load or update.
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*
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* The G5 is more fully out-of-order, and can find the parallelism
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* by itself. The big limit is that it has a 2-cycle ALU latency, so
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* even though it's 2-way, the code has to be scheduled as if it's
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* 4-way, which can be a limit. To help it, we try to schedule the
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* read of RA(t) as late as possible so it doesn't stall waiting for
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* the previous round's RE(t-1), and we try to rotate RB(t) as early
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* as possible while reading RC(t) (= RB(t-1)) as late as possible.
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*/
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/* the initial loads. */
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#define LOADW(s) \
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lwz W(s),(s)*4(%r4)
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/*
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* Perform a step with F0, and load W(s). Uses W(s) as a temporary
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* before loading it.
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* This is actually 10 instructions, which is an awkward fit.
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* It can execute grouped as listed, or delayed one instruction.
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* (If delayed two instructions, there is a stall before the start of the
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* second line.) Thus, two iterations take 7 cycles, 3.5 cycles per round.
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*/
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#define STEPD0_LOAD(t,s) \
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add RE(t),RE(t),W(t); andc %r0,RD(t),RB(t); and W(s),RC(t),RB(t); \
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add RE(t),RE(t),%r0; rotlwi %r0,RA(t),5; rotlwi RB(t),RB(t),30; \
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add RE(t),RE(t),W(s); add %r0,%r0,%r5; lwz W(s),(s)*4(%r4); \
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add RE(t),RE(t),%r0
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/*
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* This is likewise awkward, 13 instructions. However, it can also
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* execute starting with 2 out of 3 possible moduli, so it does 2 rounds
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* in 9 cycles, 4.5 cycles/round.
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*/
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#define STEPD0_UPDATE(t,s,loadk...) \
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add RE(t),RE(t),W(t); andc %r0,RD(t),RB(t); xor W(s),W((s)-16),W((s)-3); \
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add RE(t),RE(t),%r0; and %r0,RC(t),RB(t); xor W(s),W(s),W((s)-8); \
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add RE(t),RE(t),%r0; rotlwi %r0,RA(t),5; xor W(s),W(s),W((s)-14); \
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add RE(t),RE(t),%r5; loadk; rotlwi RB(t),RB(t),30; rotlwi W(s),W(s),1; \
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add RE(t),RE(t),%r0
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/* Nicely optimal. Conveniently, also the most common. */
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#define STEPD1_UPDATE(t,s,loadk...) \
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add RE(t),RE(t),W(t); xor %r0,RD(t),RB(t); xor W(s),W((s)-16),W((s)-3); \
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add RE(t),RE(t),%r5; loadk; xor %r0,%r0,RC(t); xor W(s),W(s),W((s)-8); \
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add RE(t),RE(t),%r0; rotlwi %r0,RA(t),5; xor W(s),W(s),W((s)-14); \
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add RE(t),RE(t),%r0; rotlwi RB(t),RB(t),30; rotlwi W(s),W(s),1
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/*
|
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* The naked version, no UPDATE, for the last 4 rounds. 3 cycles per.
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* We could use W(s) as a temp register, but we don't need it.
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*/
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#define STEPD1(t) \
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add RE(t),RE(t),W(t); xor %r0,RD(t),RB(t); \
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rotlwi RB(t),RB(t),30; add RE(t),RE(t),%r5; xor %r0,%r0,RC(t); \
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add RE(t),RE(t),%r0; rotlwi %r0,RA(t),5; /* spare slot */ \
|
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add RE(t),RE(t),%r0
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|
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/*
|
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* 14 instructions, 5 cycles per. The majority function is a bit
|
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* awkward to compute. This can execute with a 1-instruction delay,
|
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* but it causes a 2-instruction delay, which triggers a stall.
|
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*/
|
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#define STEPD2_UPDATE(t,s,loadk...) \
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add RE(t),RE(t),W(t); and %r0,RD(t),RB(t); xor W(s),W((s)-16),W((s)-3); \
|
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add RE(t),RE(t),%r0; xor %r0,RD(t),RB(t); xor W(s),W(s),W((s)-8); \
|
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add RE(t),RE(t),%r5; loadk; and %r0,%r0,RC(t); xor W(s),W(s),W((s)-14); \
|
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add RE(t),RE(t),%r0; rotlwi %r0,RA(t),5; rotlwi W(s),W(s),1; \
|
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add RE(t),RE(t),%r0; rotlwi RB(t),RB(t),30
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|
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#define STEP0_LOAD4(t,s) \
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STEPD0_LOAD(t,s); \
|
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STEPD0_LOAD((t+1),(s)+1); \
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STEPD0_LOAD((t)+2,(s)+2); \
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STEPD0_LOAD((t)+3,(s)+3)
|
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|
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#define STEPUP4(fn, t, s, loadk...) \
|
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STEP##fn##_UPDATE(t,s,); \
|
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STEP##fn##_UPDATE((t)+1,(s)+1,); \
|
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STEP##fn##_UPDATE((t)+2,(s)+2,); \
|
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STEP##fn##_UPDATE((t)+3,(s)+3,loadk)
|
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|
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#define STEPUP20(fn, t, s, loadk...) \
|
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STEPUP4(fn, t, s,); \
|
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STEPUP4(fn, (t)+4, (s)+4,); \
|
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STEPUP4(fn, (t)+8, (s)+8,); \
|
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STEPUP4(fn, (t)+12, (s)+12,); \
|
||||
STEPUP4(fn, (t)+16, (s)+16, loadk)
|
||||
|
||||
.globl ppc_sha1_core
|
||||
ppc_sha1_core:
|
||||
stwu %r1,-80(%r1)
|
||||
stmw %r13,4(%r1)
|
||||
|
||||
/* Load up A - E */
|
||||
lmw %r27,0(%r3)
|
||||
|
||||
mtctr %r5
|
||||
|
||||
1:
|
||||
LOADW(0)
|
||||
lis %r5,0x5a82
|
||||
mr RE(0),%r31
|
||||
LOADW(1)
|
||||
mr RD(0),%r30
|
||||
mr RC(0),%r29
|
||||
LOADW(2)
|
||||
ori %r5,%r5,0x7999 /* K0-19 */
|
||||
mr RB(0),%r28
|
||||
LOADW(3)
|
||||
mr RA(0),%r27
|
||||
|
||||
STEP0_LOAD4(0, 4)
|
||||
STEP0_LOAD4(4, 8)
|
||||
STEP0_LOAD4(8, 12)
|
||||
STEPUP4(D0, 12, 16,)
|
||||
STEPUP4(D0, 16, 20, lis %r5,0x6ed9)
|
||||
|
||||
ori %r5,%r5,0xeba1 /* K20-39 */
|
||||
STEPUP20(D1, 20, 24, lis %r5,0x8f1b)
|
||||
|
||||
ori %r5,%r5,0xbcdc /* K40-59 */
|
||||
STEPUP20(D2, 40, 44, lis %r5,0xca62)
|
||||
|
||||
ori %r5,%r5,0xc1d6 /* K60-79 */
|
||||
STEPUP4(D1, 60, 64,)
|
||||
STEPUP4(D1, 64, 68,)
|
||||
STEPUP4(D1, 68, 72,)
|
||||
STEPUP4(D1, 72, 76,)
|
||||
addi %r4,%r4,64
|
||||
STEPD1(76)
|
||||
STEPD1(77)
|
||||
STEPD1(78)
|
||||
STEPD1(79)
|
||||
|
||||
/* Add results to original values */
|
||||
add %r31,%r31,RE(0)
|
||||
add %r30,%r30,RD(0)
|
||||
add %r29,%r29,RC(0)
|
||||
add %r28,%r28,RB(0)
|
||||
add %r27,%r27,RA(0)
|
||||
|
||||
bdnz 1b
|
||||
|
||||
/* Save final hash, restore registers, and return */
|
||||
stmw %r27,0(%r3)
|
||||
lmw %r13,4(%r1)
|
||||
addi %r1,%r1,80
|
||||
blr
|
||||
Loading…
Reference in New Issue
Block a user